1. Field of the Invention
The present invention relates to the technical field of analog layout and, more particularly, to a method for analog placement and global routing considering wiring symmetry.
2. Description of Related Art
Analog designs are quite different from digital designs from a layout perspective. Unlike a large-scale digital design, an analog design usually has a relatively small scale, i.e., an analog circuit typically has a relatively small die size. However, its physical behavior is very sensitive to the layout geometry, e.g., parasitic coupling effect, small signal transmission, wiring crossovers, etc. Hence, area minimization is usually not a concern for an analog design. A digital designer can leverage mature commercial EDA tools to automate layout generation. However, the existing and popular way to generate an analog layout is far from automatic. The manual, time-consuming, error-prone task highly depends on the layout designer's experience and wit. However, analog design automation has become desirable.
To facilitate the automatic analog layout generation, the designer's expertise can be translated to topological constraints. Three symmetry constraints, i.e., device matching, device mirroring, and device proximity constraints, for analog device placement are proposed in the prior art.
The device matching constraint is created for the devices that can share common gate or should be placed closely. The device mirroring constraint is used on two devices that have to be placed symmetrically to avoid parasitic mismatches. For the devices with the same functionality, the device proximity constraint restricts them to be placed together.
The parasitic mismatch between two devices can be minimized by the device matching constraint, the device mirroring constraint, and the device proximity constraint cited above. Nevertheless, if the signal paths going out of and coming into the symmetry constrained modules are not symmetric, the signal still mismatches and may cause the circuit failure. Therefore, for the analog design automation, the prior works only consider the device symmetry and neglect wiring symmetry. FIG. 1 is a schematic view of two typical analog layouts, which demonstrates the importance of the wiring symmetry. As shown in FIG. 1, devices A and B have the device mirroring constraint, and they are placed symmetrically. They both connect to device C. FIG. 1(a) shows a placement topology with wire asymmetry, while FIG. 1(b) shows a placement topology with wire symmetry. It can be seen in FIG. 1(a) and FIG. 1(b) that the symmetry depends not only on symmetric devices but also on the devices that they connect, because the asymmetric placement induces asymmetric wiring, leading to different physical behaviors for symmetric devices. As shown in FIG. 1(c) and FIG. 1(d), although mirroring devices A and B are placed symmetrically with their common connected device C, careless routing may distort the symmetry. Obviously, compared with FIG. 1(c), the topology in FIG. 1(d) is symmetric on both placement and routing. The previous works have emphasized only on device (placement) symmetry, but the wiring (routing) in an analog circuit can cause the physical effect to impact on the circuit performance. Therefore, only device symmetry consideration is not enough. If the wiring symmetry is neglected at layout, it causes unbalanced physical behavior to these symmetric devices and cannot achieve the symmetric layout.
Therefore, it is desirable to provide an improved method for analog placement and global routing considering wiring symmetry to mitigate and/or obviate the aforementioned problems.